COMPUTER DATA CONVERSION CONTENTS
WEEK 10
CLASS: SS 2
SUBJECT: COMPUTER SCIENCE
TOPIC: COMPUTER DATA CONVERSION (Cont’d) CONTENTS
- Outlines steps in ‘data-fetch-execute’ cycle in a simple form
- Factors affecting speed of data transfer
Sub-Topic 1: OUTLINES STEPS IN ‘DATA-FETCH-EXECUTE’ CYCLE IN A SIMPLE FORM
Micro-computer can perform the data read and write operations with the memory. When the memory is receiving data from microcomputer, it is called aWRITE operation, and data is stored into a selected memory location. When the memory is sending data to microcomputer element it is called aREAD operation.
As soon as a computer is powered on, it begins the process of the fetch-execute cycle. This cycle is however, from the beginning of the PC startup, the computer is run.The cycle contains 3 main parts.
- Fetch next instruction
- Decode instruction
- Run instruction
The Fetch Cycle
Fetch execute cycle is the very basic way a computer works. It collects data from the memory and stores it in the MBR as well as setting the program to load the next step. This prepares the processor for the information it is about to receive, as well as progress the program ready for the next processor cycle.
The Execute Cycle
This cycle processes the command and returns the result.
EVALUATION
- Simply state how computer read and write information.
Sub-Topic 2: FACTORS AFFECTING SPEED OF DATA TRANSFER
The bus refers to the paths between the components of a computer. The data bus and the address bus are two main buses in a computer which are located on the motherboard.
The performance of computer buses was measured by the number of bits they could transfer at one time. Hence, the newest 64-bit buses are typically considered the fastest available. This type of performance is usually measured in megabits per second (Mbps) or megabytes per second (MBps).
THE FACTORS ARE:
BUS Speed:The speed of the bus reflects how many bits of information can be sent across each wire each second. Most buses transmit one bit of data per line, per clock cycle; although newer high performance buses like AGP (compute accelerated graphics port) may actually move two bits of data per clock cycle.
Similarly, older buses like the ISA (industry standard architecture) bus may take two clock cycles to move one bit, halving performance. This is the number of data packets sent or received per second and its frequency is expressed inHertz
BUS WIDTH
A bus is a channel over which information flows. The wider the bus, the more information can flow over the channel, much as a wider highway can carry more cars than a narrow one.
The original ISA bus on the IBM PC was 8 bit wide; the universal ISA bus used now is 16 bits. The other I/O buses including VL-Bus (VLB) and peripheral component interconnect (PCI) are 32 bits wide. The memory and processor buses on Pentium and higher PCs are 64 bits wide.
EVALUATION
- State the factors affecting speed of data
- What is the effect of the bus width on the speed of a computer?
GENERAL EVALUATION
- State steps that are involved in data-fetch-execute cycle
- Explain why computer does need data
READING ASSIGNMENT
Read and summarize the following week topic.
WEEKEND ASSIGNMENT
- Which of the following affects the speed of a data transfer? (a) Bus width (b) Address bus (c) Memory location (d) Control unit
- The result of an instruction cycle is stored in the
(a) RAM (b) ROM (c) Main memory (d) CPU
- Bus speed is expressed in
(a) Joules (b) Hertz (c) Newton (d) Kilogram
- decodes the program instruction in the (a) ALU (b) MDR (c) CU (d) CIR
- In Fetch-execute cycle, is loaded with the address of the instruction. (a) MDR (b) MAR (c) CIR (d) PC
ESSAY QUESTION
- List three types of registers and state the functions of each.
